# AT91SAM7L128 MC

## AT91SAM7L Memory Controller (MC) User Interface

### Registers

Register Mapping
Address | Register | Name | Access | Reset
--- | --- | --- | --- | ---
0xFFFFFF00 | MC Remap Control Register | MC_RCR | write-only | -
0xFFFFFF04 | MC Abort Status Register | MC_ASR | read-only | 0x0
0xFFFFFF08 | MC Abort Address Status Register | MC_AASR | read-only | 0x0
0xFFFFFF60 | EFC0 Configuration Registers | SeetheEmbeddedFlashControllerSection | read-write | -

### Register Fields

#### MC MC Remap Control Register

Name: MC_RCR

Access: write-only

Address: 0xFFFFFF00

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | - | -
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | - | RCB

- RCB: Remap Command Bit

- 0 = No effect.
- 1 = This Command Bit acts on a toggle basis. Writing a 1 alternatively cancels and restores the remapping of the page zero memory devices.

#### MC MC Abort Status Register

Name: MC_ASR

Access: read-only

Address: 0xFFFFFF04

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | SVMST_ARM | SVMST_PDC | SVMST_EMAC
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | MST_ARM | MST_PDC | MST_EMAC
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | ABTTYP | ABTSZ
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | MISADD | UNDADD

- UNDADD: Undefined Address Abort Status

- 0 = The last abort was not due to the access of an undefined address in the address space.
- 1 = The last abort was due to the access of an undefined address in the address space.

- MISADD: Misaligned Address Abort Status

- 0 = The last aborted access was not due to an address misalignment.
- 1 = The last aborted access was due to an address misalignment.

- ABTSZ: Abort Size Status

- 0x0 = Byte
- 0x1 = Half-word
- 0x2 = Word
- 0x3 = Reserved

- ABTTYP: Abort Type Status

- 0x0 = Data Read
- 0x1 = Data Write
- 0x2 = Code Fetch
- 0x3 = Reserved

- MST_EMAC: EMAC Abort Source

- 0 = The last aborted access was not due to the EMAC.
- 1 = The last aborted access was due to the EMAC.

- MST_PDC: PDC Abort Source

- 0 = The last aborted access was not due to the PDC.
- 1 = The last aborted access was due to the PDC.

- MST_ARM: ARM Abort Source

- 0 = The last aborted access was not due to the ARM.
- 1 = The last aborted access was due to the ARM.

- SVMST_EMAC: Saved EMAC Abort Source

- 0 = No abort due to the EMAC occurred since the last read of MC_ASR or it is notified in the bit MST_EMAC.
- 1 = At least one abort due to the EMAC occurred since the last read of MC_ASR.

- SVMST_PDC: Saved PDC Abort Source

- 0 = No abort due to the PDC occurred since the last read of MC_ASR or it is notified in the bit MST_PDC.
- 1 = At least one abort due to the PDC occurred since the last read of MC_ASR.

- SVMST_ARM: Saved ARM Abort Source

- 0 = No abort due to the ARM occurred since the last read of MC_ASR or it is notified in the bit MST_ARM.
- 1 = At least one abort due to the ARM occurred since the last read of MC_ASR.

#### MC MC Abort Address Status Register

Name: MC_AASR

Access: read-only

Address: 0xFFFFFF08

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
ABTADD
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
ABTADD
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
ABTADD
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
ABTADD

- ABTADD: Abort Address

-

#### MC EFC0 Configuration Registers

Name: SeetheEmbeddedFlashControllerSection

Access: read-write

Address: 0xFFFFFF60

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | - | -
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | - | -