AT91SAM7L128 PIT

Periodic Interval Timer (PIT) User Interface

Registers

Register Mapping

Address	Register	Name	Access	Reset
0xFFFFFD40	Mode Register	PIT_MR	read-write	0x000FFFFF
0xFFFFFD44	Status Register	PIT_SR	read-only	0x00000000
0xFFFFFD48	Periodic Interval Value Register	PIT_PIVR	read-only	0x00000000
0xFFFFFD4C	Periodic Interval Image Register	PIT_PIIR	read-only	0x00000000

Register Fields

PIT Mode Register

Name: PIT_MR

Access: read-write

Address: 0xFFFFFD40

31	30	29	28	27	26	25	24
-	-	-	-	-	-	PITIEN	PITEN
23	22	21	20	19	18	17	16
-	-	-	-	PIV
15	14	13	12	11	10	9	8
PIV
7	6	5	4	3	2	1	0
PIV

• PIV: Periodic Interval Value

-

• PITEN: Period Interval Timer Enabled
• 0 = The Periodic Interval Timer is disabled when the PIV value is reached.
• 1 = The Periodic Interval Timer is enabled.
• PITIEN: Periodic Interval Timer Interrupt Enable
• 0 = The bit PITS in PIT_SR has no effect on interrupt.
• 1 = The bit PITS in PIT_SR asserts interrupt.

PIT Status Register

Name: PIT_SR

Access: read-only

Address: 0xFFFFFD44

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
-	-	-	-	-	-	-	-
7	6	5	4	3	2	1	0
-	-	-	-	-	-	-	PITS

• PITS: Periodic Interval Timer Status
• 0 = The Periodic Interval timer has not reached PIV since the last read of PIT_PIVR.
• 1 = The Periodic Interval timer has reached PIV since the last read of PIT_PIVR.

PIT Periodic Interval Value Register

Name: PIT_PIVR

Access: read-only

Address: 0xFFFFFD48

31	30	29	28	27	26	25	24
PICNT
23	22	21	20	19	18	17	16
PICNT				CPIV
15	14	13	12	11	10	9	8
CPIV
7	6	5	4	3	2	1	0
CPIV

• CPIV: Current Periodic Interval Value

-

• PICNT: Periodic Interval Counter

-

PIT Periodic Interval Image Register

Name: PIT_PIIR

Access: read-only

Address: 0xFFFFFD4C

31	30	29	28	27	26	25	24
PICNT
23	22	21	20	19	18	17	16
PICNT				CPIV
15	14	13	12	11	10	9	8
CPIV
7	6	5	4	3	2	1	0
CPIV

• CPIV: Current Periodic Interval Value

-

• PICNT: Periodic Interval Counter

-