AT91 Basic Boot
project for AT91RM9200DK
Introduction
The goal of this demonstration project is to
supply a simple solution to realize properly with efficiency a basic boot for
your future application on the AT91RM9200.
Mainly, it initialises the power management controller, the SDRAM and
the AT49BV1614 Flash, the different stacks, the exception vectors and finally C
variables. This program also invokes the AT91 library V3.
Running the application
This application is linked in order to be loaded and
run:
·
Either totally in SRAM: Code and Data linked in 0x200000 for a debug
use.
·
Or for your
future boot program in ROM or Flash: Code linked in 0x0 and data in 0x200000.
This very small application (lower than 5 kb)
sends through the DBGU serial port (115.2Kbps, 8 data bits, no parity, 1 stop
bit, no flux control), messages corresponding to the correct execution of the
code but be careful, not necessarily a good initialisation of the Power
Management Controller, SDRAM or Flash memory (cf. Description).
Description
The program is simple: it just writes AT91F_LowLevelInit()
Complete! and BasicBoot successful:
Enter main() through the DBGU serial port after the basic
initialisations completed. This is the start-point to write a more complex
application running on an AT91RM9200 but with a correct behaviour of the
Power Management, Flash memory and SDRAM.
The start-up of this application is divided
in two files: one in assembly (cstartup_xxx.s) and one in C (init_xxx.c).
Assembly code tends to be as small as possible and thus calls C functions as
soon as possible.
|
cstartup_xxx.s |
init.c |
|
The initialisation
sequence is:
·
Configure Coprocessor
Register cp15. ·
Initialise C variables ·
Branch
on the function main(): send a second string “BasicBoot
successful: Enter main() ” on the
DBGU: AT91F_DBGU_Printk used.
|
AT91F_LowLevelInit():
(Following can be done later in the main
application)
|
In a debug use:
·
The display on the DGBU
of the two sentences indicates only a good execution of the code, but not
necessarily a correct initialisation of the Power Management. Indeed, for
example, if a frequency out of the PLL range is written, the AT91F_CheckPLL_FrequencyRange
function will abort the AT91F_InitClocks execution and so the PLL and
Master/Processor Clock chosen will not be programmed. So, this test should be
deleted in case of a boot program execution on ROM.
·
After a reset, Slow
Clock is normally selected. But in case of a boot already started (so in a full
SRAM execution) and in order to be in a “reset situation”, Slow Clock is
selected. This operation is effectuated in two steps because of constraints on
the Master Clock selection sequence. (Cf. cstartup_ads.s Step
0a.). Finally, PLLs are turned off: Step 0b. (same
situation for Step5 in init_ram.c)
Stacks are defined in cstartup_xxx.s. Stacks’
size corresponds to predefines set in the project. Cstartup_xxx.s must be
placed at the beginning of the image.
Source files
|
./init_xxx.c |
Includes low level functions definitions |
|
./main.c |
This is the application |
|
./bin_xxx/cstartup_xxx.s |
Cstartup |
Related Documents
External Bus Interface Datasheet: 1759B.pdf
Static Memory Controller 2 Datasheet: 1783A.pdf
SDRAM Controller Datasheet: 1758B.pdf
Advanced Power Management Controller Datasheet:
2637A.pdf
Synchronous DRAM
Micron: 128MSDRAM_E.pdf
ATMEL 16-megabit
Flash Memory AT49BV1614: doc1411.pdf