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MCUZone产品页面:AT91SAM7SE-EK

芯片介绍

• Incorporates the ARM7TDMI® ARM® Thumb® Processor

– High-performance 32-bit RISC Architecture

– High-density 16-bit Instruction Set

– Leader in MIPS/Watt

– EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support

• Internal High-speed Flash

– 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (AT91SAM7SE512)

– 256 Kbytes (AT91SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (AT91SAM7SE256)

– 32 Kbytes (AT91SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (AT91SAM7SE32)

– Single Cycle Access at Up to 30 MHz in Worst Case Conditions

– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed

– Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms

– 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities,Flash Security Bit

– Fast Flash Programming Interface for High Volume Production

• 32 Kbytes (AT91SAM7SE512/256) or 8 Kbytes (AT91SAM7SE32) of Internal High-speed SRAM, Single-cycle Access at Maximum Speed

• One External Bus Interface (EBI)

– Supports SDRAM, Static Memory, Glueless Connection to CompactFlash® and ECC-enabled NANDFlash

• Memory Controller (MC)

– Embedded Flash Controller

– Memory Protection Unit

– Abort Status and Misalignment Detection

• Reset Controller (RSTC)

– Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector

– Provides External Reset Signal Shaping and Reset Source Status

• Clock Generator (CKGR)

– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL

• Power Management Controller (PMC)

– Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode

– Three Programmable External Clock Signals

• Advanced Interrupt Controller (AIC)

– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources

– Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected

• Debug Unit (DBGU)

– Two-wire UART and Support for Debug Communication Channel interrupt,Programmable ICE Access Prevention

• Periodic Interval Timer (PIT)

– 20-bit Programmable Counter plus 12-bit Interval Counter

• Windowed Watchdog (WDT)

– 12-bit key-protected Programmable Counter

– Provides Reset or Interrupt Signals to the System

– Counter May Be Stopped While the Processor is in Debug State or in Idle Mode

• Real-time Timer (RTT)

– 32-bit Free-running Counter with Alarm

– Runs Off the Internal RC Oscillator

• Three Parallel Input/Output Controllers (PIO)

– Eighty-eight Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os

– Input Change Interrupt Capability on Each I/O Line

– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output

– Schmitt Trigger on All inputs

• Eleven Peripheral DMA Controller (PDC) Channels

• One USB 2.0 Full Speed (12 Mbits per second) Device Port

– On-chip Transceiver, Eight Endpoints, 2688-byte Configurable Integrated FIFOs

• One Synchronous Serial Controller (SSC)

– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter

– I²S Analog Interface Support, Time Division Multiplex Support

– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer

• Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)

– Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation

– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support

– Full Modem Line Support on USART1

• One Master/Slave Serial Peripheral Interfaces (SPI)

– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects

• One Three-channel 16-bit Timer/Counter (TC)

– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel

– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability

• One Four-channel 16-bit PWM Controller (PWMC)

• One Two-wire Interface (TWI)

– Master, Multi-Master and Slave Mode Support, All Two-wire Atmel EEPROMs Supported

– General Call Supported in Slave Mode

• One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os

• SAM-BA™

– Default Boot program

– Interface with SAM-BA Graphic User Interface

• IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins

• Four High-current Drive I/O lines, Up to 16 mA Each

• Power Supplies

– Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components

– 1.8V or 3,3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply

– 1.8V VDDCORE Core Power Supply with Brownout Detector

• Fully Static Operation: Up to 48 MHz at 1.65V and 85C Worst Case Conditions

• Available in a 128-lead LQFP Green Package, or a 144-ball LFBGA RoHS-compliant Package

相关资料

SAM7SE-EK介绍

硬件配置如下:

  • CPU为AT91SAM7SE系列,可以是SAM7SE32,也可以为SAM7SE512
  • 18.432MHz晶振
  • 采用3.3供电,内核电压有片内LDO产生
  • 按键复位
  • 基于AT73C213的音频接口(可选)
  • 32MB SDRAM
  • 128M NAND FLASH
  • JTAG接口
  • USB Device
  • DBGU调试串口
  • 1个四线串口
  • 1个电源指示LED,两个通用LED
  • 1个游戏摇杆接口,两个通用按键
  • 1个10M/100M快速以太网
  • 全部IO引出

参考图片

空PCB

8080_shop_syssite_home_shop_1_pictures_newsimg_1209569310.jpg

EK成品效果图

 原装EK

学习笔记

参考范例


GHS范例:
08-01-20:GHS

IAR范例:
08-01-20:IAR


Keil范例:
08-01-20: Keil 范例


ATMEL提供的资料:
08-01-20:AT91SAM7SE CD-ROM

配套软件

07-04-11:串口工具DNW

07-04-11:串口调试软件SSCOM V3.0

07-04-11:ADS 1.2

07-04-11:IAR for ARM 4.40a

07-07-22:IAR for ARM 4.42a

07-04-11:Keil for ARM 3.03a

07-04-26:Keil for ARM 3.05a

07-07-22:Keil for ARM 3.11a

07-04-11:WinARM-20060606

07-04-11:RealView 2.2

07-04-11:Multi-ICE Server2.2安装版本

07-04-11:Multi-ICE Server2.2.6升级文件

07-04-25:H-JTAG

07-07-22:AT91 ISP V1.9

开发工具

07-04-25:wiggler

07-04-25:并口Multi-ICE

07-04-25:USB Multi-ICE

07-04-25:U-LINK1

07-04-25:U-LINK2

07-04-25:J-LINK V5.3

07-07-12:J-LINK V6

联系我们

QQ:8204136
CP:13957118045 章先生
FAX:0571-89908193
MSN:hdapple_2000@hotmail.com

购买产品

 
product\sam7se-ek.txt · 最后更改: 2008/06/16 20:57 由 hzxiao
 
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